Wednesday, December 22, 2010

6502 sim on iPhone and Kindle

Just got word from an ambitious reader that the non-graphic sim runs fine on iPhone and Kindle. Amazing, and more evidence that Brian and Barry's work in JavaScript is a great, great thing.

To run without graphics:
http://www.visual6502.org/JSSim/expert.html?graphics=f

Thursday, November 25, 2010

6502 Layer Images

It's been a while, but we've made great progress with image stitching and chemistry for de-layering. We've imaged an Intel 8080, 8085, Motorola 6800, 68000, MOS 6507, 6532, a Zilog Z80, and we've had our first taste of x-rays for imaging packages and wire bonding before the de-capping process. Not all of this material is ready, so for now, I've posted the high resolution 6502 images we used to create the vector polygon model and chip simulation. We also have an image index of various layers by themselves and in combination with other layers - part of a tutorial we're putting together. The layer images are all aligned and the same size, so you can compare them in your favorite image app.


  

Wednesday, September 22, 2010

6502 vs. 6507

Many sites mention something to the effect of, "The 6507 is just a 6502 in a smaller package."  Well, not quite.  The two are almost identical, but the 6507D from our Atari 2600 system has a slightly different metal layer.  Metal is used to make the last digit of the on-die part number, so it's an easy change from "6502" to "6507"  Also, the 6507 has its NMI and IRQ pads permanently hooked up to the +5V supply.  This disables both flavors of interrupt in the 6507.

MOS 6507
MOS 6502 rev D and 6507 rev D die labels
Difference in metal layer between MOS 6502 and 6507 


Friday, September 17, 2010

Tuesday, September 14, 2010

We're live!

It's been a busy July and August, but thanks to Barry, Brian, and the latest addition to our team, Ed, our website is off the ground and showcasing our JavaScript simulation of the full 6502 chip!  To get you settled into the landscape of the 6502, here's a low res shot of the chip die and a glimpse of our vector polygon model of the chip, annotated to show which pads connect to which pins of the 40-pin plastic chip package.